3rd NASCUG Meeting Agenda & Presentations
13 June 2005
Presentations from the NASCUG meeting are available for download in the table below.
| 2:30 - 3:00 pm | Registration |
|---|---|
| 3:00 - 3:05 pm | Welcome and NASCUG Business
Jack Donovan, ESLX Inc. Presentation |
| 3:05 - 3.15 pm | SystemC IEEE Standardization
Victor Berman, Cadence Design Systems, Inc. Presentation |
| 3:15 - 3:35 pm | Introduction to the SystemC TLM Standard & Path to IEEE Standardization Stuart Swan, Cadence Design Systems, Inc. Presentation |
| 3:35 - 3:55 pm | Transaction Level Modeling and Verification in SystemC
Adam Rose, Mentor Graphics, UK Presentation |
| 3:55 - 4:15 pm | Towards A Heterogeneous Simulation Kernel for System Level Models in SystemC
Hiren Patel, Sandeep Shukla, Virginia Tech. Presentation |
| 4:15 - 4:35 pm | Modeling Dynamic Reconfiguration of FPGAs with SystemC 2.1
Adam Donlin, Xilinx Presentation |
| 4:35 - 4:55 pm | Platform Aware Algorithm Design Framework
Kota Bhaskar, Element CXI Presentation |
| 4:55 - 5:15 pm | Modeling Software Interrupts using SystemC
David Black, ESLX Inc Presentation |
| 5:15 - 5:20 pm | Wrap Up and Door Prize Give Away Presentation |
| 5:20 - 6:00 pm | SystemC Networking and Beverages |
Thanks to our sponsors
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